Main Program (`PoC.py`)¶

The main program PoC.py expects the environment variable PoCRootDirectory to be set.

PoC.py¶

This is the PoC-Library Service Tool.

usage: PoC.py [--prj ProjectID] [--sln SolutionID] [-q] [-v] [-d] [--dryrun]
                  [-D]
                  {list-project,quartus,coregen,configure,help,asim,info,vsim,vivado,ghdl,ise,list-testbench,isim,cocotb,lse,query,xst,xci,list-solution,xsim,remove-solution,add-solution,rpro,list-netlist}
                  ...

--prj <projectid>¶: Project name.

--sln <solutionid>¶: Solution name.

-q, --quiet¶: Reduce messages to a minimum.

-v, --verbose¶: Print out detailed messages.

-d, --debug¶: Enable debug mode.

--dryrun¶: Don’t execute external programs.

-D¶: Enable script wrapper debug mode. See also poc.ps1 -D.

Pile-of-Cores

PoC.py add-solution¶

Add a solution to PoC.

usage: PoC.py add-solution [-h]

-h, --help¶: show this help message and exit

PoC.py asim¶

Simulate a PoC Entity with Aldec Active-HDL.

usage: PoC.py asim [-h] [-g] [-a] [-e] [-R] [-s] [-w] [-C] [-W] [-S] [-r]
                       [--std VHDLVersion] [--device DeviceName]
                       [--board BoardName]
                       PoC Entity [PoC Entity ...]

poc entity¶: A space separated list of PoC entities.

-h, --help¶: show this help message and exit

-g, --gui¶: Run all steps (prepare, analysis, elaboration, optimization, simulation) and finally display the waveform in a GUI window.

-a, --analyze¶: Run only the prepare and analysis step.

-e, --elaborate¶: Run only the prepare and elaboration step.

-R, --recompile¶: Run all compile steps (prepare, analysis, elaboration, optimization).

-s, --simulate¶: Run only the prepare and simulation step.

-w, --showwave¶: Run only the prepare step and display the waveform in a GUI window.

-C, --showcoverage¶: Run only the prepare step and display the coverage data in a GUI window.

-W, --review¶: Run only display the waveform in a GUI window.

-S, --resimulate¶: Run all simulation steps (prepare, simulation) and finally display the waveform in a GUI window.

-r, --showreport¶: Show a simulation report.

--std <vhdlversion>¶: Simulate with VHDL-??

--device <devicename>¶: The target platform’s device name.

--board <boardname>¶: The target platform’s board name.

PoC.py cocotb¶

Simulate a PoC Entity with Cocotb and QuestaSim.

usage: PoC.py cocotb [-h] [-g] [-a] [-e] [-R] [-s] [-w] [-C] [-W] [-S] [-r]
                         [--device DeviceName] [--board BoardName]
                         PoC Entity [PoC Entity ...]

poc entity¶: A space separated list of PoC entities.

-h, --help¶: show this help message and exit

-g, --gui¶: Run all steps (prepare, analysis, elaboration, optimization, simulation) and finally display the waveform in a GUI window.

-a, --analyze¶: Run only the prepare and analysis step.

-e, --elaborate¶: Run only the prepare and elaboration step.

-R, --recompile¶: Run all compile steps (prepare, analysis, elaboration, optimization).

-s, --simulate¶: Run only the prepare and simulation step.

-w, --showwave¶: Run only the prepare step and display the waveform in a GUI window.

-C, --showcoverage¶: Run only the prepare step and display the coverage data in a GUI window.

-W, --review¶: Run only display the waveform in a GUI window.

-S, --resimulate¶: Run all simulation steps (prepare, simulation) and finally display the waveform in a GUI window.

-r, --showreport¶: Show a simulation report.

--device <devicename>¶: The target platform’s device name.

--board <boardname>¶: The target platform’s board name.

PoC.py configure¶

usage: PoC.py configure [-h] [--set-default-tools] [--relocated] [ToolChain]

toolchain¶: Specify a tool chain to be configured.

-h, --help¶: show this help message and exit

--set-default-tools¶: Set default tool for a tool chain.

--relocated¶: Consistency check after PoC was relocated.

PoC.py coregen¶

Generate an IP core with Xilinx ISE Core Generator.

usage: PoC.py coregen [-h] [-s] [-r] [--no-cleanup] [--device DeviceName]
                          [--board BoardName]
                          PoC Entity [PoC Entity ...]

poc entity¶: A space separated list of PoC entities.

-h, --help¶: show this help message and exit

-s, --synthesize¶: Run only the prepare and synthesize step.

-r, --showreport¶: Show a simulation report.

--no-cleanup¶: Don’t delete intermediate files. Skip post-delete rules.

--device <devicename>¶: The target platform’s device name.

--board <boardname>¶: The target platform’s board name.

PoC.py ghdl¶

Simulate a PoC Entity with GHDL.

usage: PoC.py ghdl [-h] [--reproducer Name] [--with-coverage] [-g] [-a] [-e]
                       [-R] [-s] [-w] [-C] [-W] [-S] [-r] [--std VHDLVersion]
                       [--device DeviceName] [--board BoardName]
                       PoC Entity [PoC Entity ...]

poc entity¶: A space separated list of PoC entities.

-h, --help¶: show this help message and exit

--reproducer <name>¶: Create a bug reproducer

--with-coverage¶: Compile with coverage information.

-g, --gui¶: Run all steps (prepare, analysis, elaboration, optimization, simulation) and finally display the waveform in a GUI window.

-a, --analyze¶: Run only the prepare and analysis step.

-e, --elaborate¶: Run only the prepare and elaboration step.

-R, --recompile¶: Run all compile steps (prepare, analysis, elaboration, optimization).

-s, --simulate¶: Run only the prepare and simulation step.

-w, --showwave¶: Run only the prepare step and display the waveform in a GUI window.

-C, --showcoverage¶: Run only the prepare step and display the coverage data in a GUI window.

-W, --review¶: Run only display the waveform in a GUI window.

-S, --resimulate¶: Run all simulation steps (prepare, simulation) and finally display the waveform in a GUI window.

-r, --showreport¶: Show a simulation report.

--std <vhdlversion>¶: Simulate with VHDL-??

--device <devicename>¶: The target platform’s device name.

--board <boardname>¶: The target platform’s board name.

PoC.py help¶

usage: PoC.py help [-h] [Command]

command¶: Print help page(s) for a command.

-h, --help¶: show this help message and exit

PoC.py info¶

usage: PoC.py info [-h]

-h, --help¶: show this help message and exit

PoC.py ise¶

Generate any IP core for the Xilinx ISE tool chain.

usage: PoC.py ise [-h] [-s] [-r] [--no-cleanup] [--device DeviceName]
                      [--board BoardName]
                      PoC Entity [PoC Entity ...]

poc entity¶: A space separated list of PoC entities.

-h, --help¶: show this help message and exit

-s, --synthesize¶: Run only the prepare and synthesize step.

-r, --showreport¶: Show a simulation report.

--no-cleanup¶: Don’t delete intermediate files. Skip post-delete rules.

--device <devicename>¶: The target platform’s device name.

--board <boardname>¶: The target platform’s board name.

PoC.py isim¶

Simulate a PoC Entity with Xilinx ISE Simulator (iSim).

usage: PoC.py isim [-h] [-g] [-a] [-e] [-R] [-s] [-w] [-C] [-W] [-S] [-r]
                       [--device DeviceName] [--board BoardName]
                       PoC Entity [PoC Entity ...]

poc entity¶: A space separated list of PoC entities.

-h, --help¶: show this help message and exit

-g, --gui¶: Run all steps (prepare, analysis, elaboration, optimization, simulation) and finally display the waveform in a GUI window.

-a, --analyze¶: Run only the prepare and analysis step.

-e, --elaborate¶: Run only the prepare and elaboration step.

-R, --recompile¶: Run all compile steps (prepare, analysis, elaboration, optimization).

-s, --simulate¶: Run only the prepare and simulation step.

-w, --showwave¶: Run only the prepare step and display the waveform in a GUI window.

-C, --showcoverage¶: Run only the prepare step and display the coverage data in a GUI window.

-W, --review¶: Run only display the waveform in a GUI window.

-S, --resimulate¶: Run all simulation steps (prepare, simulation) and finally display the waveform in a GUI window.

-r, --showreport¶: Show a simulation report.

--device <devicename>¶: The target platform’s device name.

--board <boardname>¶: The target platform’s board name.

PoC.py list-netlist¶

List all netlists.

usage: PoC.py list-netlist [-h] [--kind Kind] PoC Entity [PoC Entity ...]

poc entity¶: A space separated list of PoC entities.

-h, --help¶: show this help message and exit

--kind <kind>¶: Netlist kind: Lattice | Quartus | XST | CoreGen

PoC.py list-project¶

List all projects registered in PoC.

usage: PoC.py list-project [-h]

-h, --help¶: show this help message and exit

PoC.py list-solution¶

List all solutions registered in PoC.

usage: PoC.py list-solution [-h]

-h, --help¶: show this help message and exit

PoC.py list-testbench¶

List all testbenches.

usage: PoC.py list-testbench [-h] [--kind Kind] PoC Entity [PoC Entity ...]

poc entity¶: A space separated list of PoC entities.

-h, --help¶: show this help message and exit

--kind <kind>¶: Testbench kind: VHDL | COCOTB

PoC.py lse¶

Compile a PoC IP core with Lattice Diamond LSE to a netlist.

usage: PoC.py lse [-h] [-s] [-r] [--no-cleanup] [--device DeviceName]
                      [--board BoardName]
                      PoC Entity [PoC Entity ...]

poc entity¶: A space separated list of PoC entities.

-h, --help¶: show this help message and exit

-s, --synthesize¶: Run only the prepare and synthesize step.

-r, --showreport¶: Show a simulation report.

--no-cleanup¶: Don’t delete intermediate files. Skip post-delete rules.

--device <devicename>¶: The target platform’s device name.

--board <boardname>¶: The target platform’s board name.

PoC.py quartus¶

Compile a PoC IP core with Altera Quartus II Map to a netlist.

usage: PoC.py quartus [-h] [-s] [-r] [--no-cleanup] [--device DeviceName]
                          [--board BoardName]
                          PoC Entity [PoC Entity ...]

poc entity¶: A space separated list of PoC entities.

-h, --help¶: show this help message and exit

-s, --synthesize¶: Run only the prepare and synthesize step.

-r, --showreport¶: Show a simulation report.

--no-cleanup¶: Don’t delete intermediate files. Skip post-delete rules.

--device <devicename>¶: The target platform’s device name.

--board <boardname>¶: The target platform’s board name.

PoC.py query¶

Query PoC’s database.

usage: PoC.py query [-h] Query

query¶: todo help

-h, --help¶: show this help message and exit

PoC.py remove-solution¶

Remove a solution from PoC.

usage: PoC.py remove-solution [-h] SolutionID

solutionid¶: Solution name.

-h, --help¶: show this help message and exit

PoC.py rpro¶

usage: PoC.py rpro [-h] [-g] [-a] [-e] [-R] [-s] [-w] [-C] [-W] [-S] [-r]
                       [--std VHDLVersion] [--device DeviceName]
                       [--board BoardName]
                       PoC Entity [PoC Entity ...]

poc entity¶: A space separated list of PoC entities.

-h, --help¶: show this help message and exit

-g, --gui¶: Run all steps (prepare, analysis, elaboration, optimization, simulation) and finally display the waveform in a GUI window.

-a, --analyze¶: Run only the prepare and analysis step.

-e, --elaborate¶: Run only the prepare and elaboration step.

-R, --recompile¶: Run all compile steps (prepare, analysis, elaboration, optimization).

-s, --simulate¶: Run only the prepare and simulation step.

-w, --showwave¶: Run only the prepare step and display the waveform in a GUI window.

-C, --showcoverage¶: Run only the prepare step and display the coverage data in a GUI window.

-W, --review¶: Run only display the waveform in a GUI window.

-S, --resimulate¶: Run all simulation steps (prepare, simulation) and finally display the waveform in a GUI window.

-r, --showreport¶: Show a simulation report.

--std <vhdlversion>¶: Simulate with VHDL-??

--device <devicename>¶: The target platform’s device name.

--board <boardname>¶: The target platform’s board name.

PoC.py vivado¶

Compile a PoC IP core with Xilinx Vivado Synth to a design checkpoint.

usage: PoC.py vivado [-h] [-s] [-r] [--no-cleanup] [--device DeviceName]
                         [--board BoardName]
                         PoC Entity [PoC Entity ...]

poc entity¶: A space separated list of PoC entities.

-h, --help¶: show this help message and exit

-s, --synthesize¶: Run only the prepare and synthesize step.

-r, --showreport¶: Show a simulation report.

--no-cleanup¶: Don’t delete intermediate files. Skip post-delete rules.

--device <devicename>¶: The target platform’s device name.

--board <boardname>¶: The target platform’s board name.

PoC.py vsim¶

Simulate a PoC Entity with Mentor QuestaSim or ModelSim (vsim).

usage: PoC.py vsim [-h] [--with-coverage] [-g] [-a] [-e] [-R] [-s] [-w] [-C]
                       [-W] [-S] [-r] [--std VHDLVersion] [--device DeviceName]
                       [--board BoardName]
                       PoC Entity [PoC Entity ...]

poc entity¶: A space separated list of PoC entities.

-h, --help¶: show this help message and exit

--with-coverage¶: Compile with coverage information.

-g, --gui¶: Run all steps (prepare, analysis, elaboration, optimization, simulation) and finally display the waveform in a GUI window.

-a, --analyze¶: Run only the prepare and analysis step.

-e, --elaborate¶: Run only the prepare and elaboration step.

-R, --recompile¶: Run all compile steps (prepare, analysis, elaboration, optimization).

-s, --simulate¶: Run only the prepare and simulation step.

-w, --showwave¶: Run only the prepare step and display the waveform in a GUI window.

-C, --showcoverage¶: Run only the prepare step and display the coverage data in a GUI window.

-W, --review¶: Run only display the waveform in a GUI window.

-S, --resimulate¶: Run all simulation steps (prepare, simulation) and finally display the waveform in a GUI window.

-r, --showreport¶: Show a simulation report.

--std <vhdlversion>¶: Simulate with VHDL-??

--device <devicename>¶: The target platform’s device name.

--board <boardname>¶: The target platform’s board name.

PoC.py xci¶

Generate an IP core from Xilinx Vivado IP Catalog.

usage: PoC.py xci [-h] [-s] [-r] [--no-cleanup] [--device DeviceName]
                      [--board BoardName]
                      PoC Entity [PoC Entity ...]

poc entity¶: A space separated list of PoC entities.

-h, --help¶: show this help message and exit

-s, --synthesize¶: Run only the prepare and synthesize step.

-r, --showreport¶: Show a simulation report.

--no-cleanup¶: Don’t delete intermediate files. Skip post-delete rules.

--device <devicename>¶: The target platform’s device name.

--board <boardname>¶: The target platform’s board name.

PoC.py xsim¶

Simulate a PoC Entity with Xilinx Vivado Simulator (xSim).

usage: PoC.py xsim [-h] [-g] [-a] [-e] [-R] [-s] [-w] [-C] [-W] [-S] [-r]
                       [--std VHDLVersion] [--device DeviceName]
                       [--board BoardName]
                       PoC Entity [PoC Entity ...]

poc entity¶: A space separated list of PoC entities.

-h, --help¶: show this help message and exit

-g, --gui¶: Run all steps (prepare, analysis, elaboration, optimization, simulation) and finally display the waveform in a GUI window.

-a, --analyze¶: Run only the prepare and analysis step.

-e, --elaborate¶: Run only the prepare and elaboration step.

-R, --recompile¶: Run all compile steps (prepare, analysis, elaboration, optimization).

-s, --simulate¶: Run only the prepare and simulation step.

-w, --showwave¶: Run only the prepare step and display the waveform in a GUI window.

-C, --showcoverage¶: Run only the prepare step and display the coverage data in a GUI window.

-W, --review¶: Run only display the waveform in a GUI window.

-S, --resimulate¶: Run all simulation steps (prepare, simulation) and finally display the waveform in a GUI window.

-r, --showreport¶: Show a simulation report.

--std <vhdlversion>¶: Simulate with VHDL-??

--device <devicename>¶: The target platform’s device name.

--board <boardname>¶: The target platform’s board name.

PoC.py xst¶

Compile a PoC IP core with Xilinx ISE XST to a netlist. IP:PoC.Mem foooo baaarr.

usage: PoC.py xst [-h] [-s] [-r] [--no-cleanup] [--device DeviceName]
                      [--board BoardName]
                      PoC Entity [PoC Entity ...]

poc entity¶: A space separated list of PoC entities.

-h, --help¶: show this help message and exit

-s, --synthesize¶: Run only the prepare and synthesize step.

-r, --showreport¶: Show a simulation report.

--no-cleanup¶: Don’t delete intermediate files. Skip post-delete rules.

--device <devicename>¶: The target platform’s device name.

--board <boardname>¶: The target platform’s board name.

Main Program (PoC.py)¶