PoC.io.uart.bclk

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old comments:
UART BAUD rate generator bclk_r = bit clock is rising bclk_x8_r = bit clock times 8 is rising

Entity Declaration:

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entity uart_bclk is
  generic (
    CLOCK_FREQ    : FREQ      := 100 MHz;
    BAUDRATE      : BAUD      := 115200 Bd
  );
  port (
    clk       : in  std_logic;
    rst       : in  std_logic;
    bclk      : out std_logic;
    bclk_x8   : out std_logic
  );
end entity;