PoC.arith.counter_bcd¶
Counter with output in binary coded decimal (BCD). The number of BCD digits
is configurable by DIGITS
.
All control signals (reset rst
, increment inc
) are high-active and
synchronous to clock clk
. The output val
is the current counter
state. Groups of 4 bit represent one BCD digit. The lowest significant digit
is specified by val(3 downto 0)
.
Todo
- implement a
dec
input for decrementing - implement a
load
input to load a value
Entity Declaration:
1 2 3 4 5 6 7 8 9 10 11 | entity arith_counter_bcd is
generic (
DIGITS : positive -- Number of BCD digits
);
port (
clk : in std_logic;
rst : in std_logic; -- Reset to 0
inc : in std_logic; -- Increment
val : out T_BCD_VECTOR(DIGITS-1 downto 0) -- Value output
);
end entity;
|