PoC.io.iic.Switch_PCA9548A

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Entity Declaration:

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entity iic_Switch_PCA9548A is
  generic (
    DEBUG                     : boolean           := FALSE;
    ALLOW_MEALY_TRANSITION    : boolean           := TRUE;
    SWITCH_ADDRESS            : T_SLV_8           := x"00";
    ADD_BYPASS_PORT           : boolean           := FALSE;
    ADDRESS_BITS              : positive          := 7;
    DATA_BITS                 : positive          := 8
  );
  port (
    Clock             : in  std_logic;
    Reset             : in  std_logic;
    
    -- IICSwitch interface ports
    Request           : in  std_logic_vector(ite(ADD_BYPASS_PORT, 9, 8) - 1 downto 0);
    Grant             : out std_logic_vector(ite(ADD_BYPASS_PORT, 9, 8) - 1 downto 0);
    Command           : in  T_IO_IIC_COMMAND_VECTOR(ite(ADD_BYPASS_PORT, 9, 8) - 1 downto 0);
    Status            : out T_IO_IIC_STATUS_VECTOR(ite(ADD_BYPASS_PORT, 9, 8) - 1 downto 0);
    Error             : out T_IO_IIC_ERROR_VECTOR(ite(ADD_BYPASS_PORT, 9, 8) - 1 downto 0);
    Address           : in  T_SLM(ite(ADD_BYPASS_PORT, 9, 8) - 1 downto 0, ADDRESS_BITS downto 1);
    
    WP_Valid          : in  std_logic_vector(ite(ADD_BYPASS_PORT, 9, 8) - 1 downto 0);
    WP_Data           : in  T_SLM(ite(ADD_BYPASS_PORT, 9, 8) - 1 downto 0, DATA_BITS - 1 downto 0);
    WP_Last           : in  std_logic_vector(ite(ADD_BYPASS_PORT, 9, 8) - 1 downto 0);
    WP_Ack            : out std_logic_vector(ite(ADD_BYPASS_PORT, 9, 8) - 1 downto 0);
    RP_Valid          : out std_logic_vector(ite(ADD_BYPASS_PORT, 9, 8) - 1 downto 0);
    RP_Data           : out T_SLM(ite(ADD_BYPASS_PORT, 9, 8) - 1 downto 0, DATA_BITS - 1 downto 0);
    RP_Last           : out std_logic_vector(ite(ADD_BYPASS_PORT, 9, 8) - 1 downto 0);
    RP_Ack            : in  std_logic_vector(ite(ADD_BYPASS_PORT, 9, 8) - 1 downto 0);
    
    -- IICController master interface
    IICC_Request      : out std_logic;
    IICC_Grant        : in  std_logic;
    IICC_Command      : out T_IO_IIC_COMMAND;
    IICC_Status       : in  T_IO_IIC_STATUS;
    IICC_Error        : in  T_IO_IIC_ERROR;
    IICC_Address      : out std_logic_vector(ADDRESS_BITS downto 1);
    IICC_WP_Valid     : out std_logic;
    IICC_WP_Data      : out std_logic_vector(DATA_BITS - 1 downto 0);
    IICC_WP_Last      : out std_logic;
    IICC_WP_Ack       : in  std_logic;
    IICC_RP_Valid     : in  std_logic;
    IICC_RP_Data      : in  std_logic_vector(DATA_BITS - 1 downto 0);
    IICC_RP_Last      : in  std_logic;
    IICC_RP_Ack       : out std_logic;
    
    IICSwitch_Reset   : out std_logic
  );
end entity;