Simulator¶
Submodules
Exceptions
SimulatorException
: Base class for all SimulatorException classes. It is raised while runningSkipableSimulatorException
:SkipableSimulatorException
is aSimulatorException
, whichPoCSimulationResultNotFoundException
: This exception is raised if the expected PoC simulation result string was
Classes
SimulationSteps
: Simulation step enumeration.SimulationState
: Simulation state enumeration.SimulationResult
: Simulation result enumeration.Simulator
: Base class for all Simulator classes.
Functions
PoCSimulationResultFilter()
: Undocumented.
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exception
Simulator.
SimulatorException
(message='')[source]¶ Base class for all SimulatorException classes. It is raised while running simulation tasks in PoC.
Inheritance
Members
-
__str__
()¶ Returns the exception’s message text.
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args
¶
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exception
Simulator.
SkipableSimulatorException
(message='')[source]¶ SkipableSimulatorException
is aSimulatorException
, which can be skipped.Inheritance
Members
-
__str__
()¶ Returns the exception’s message text.
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args
¶
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exception
Simulator.
PoCSimulationResultNotFoundException
(message='')[source]¶ This exception is raised if the expected PoC simulation result string was not found in the simulator’s output.
Inheritance
Members
-
__str__
()¶ Returns the exception’s message text.
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args
¶
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class
Simulator.
SimulationSteps
[source]¶ Simulation step enumeration.
Inheritance
Members
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_FlagsArithmeticMixin__bits
¶
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_FlagsArithmeticMixin__create_flags_instance
(bits)¶
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_Flags__internal_str
()¶
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bits_from_simple_str
(s)¶
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bits_from_str
(s)¶ Converts the output of __str__ into an integer.
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data
¶
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from_simple_str
(s)¶ Accepts only the output of to_simple_str(). The output of __str__() is invalid as input.
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from_str
(s)¶ Accepts both the output of to_simple_str() and __str__().
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is_disjoint
(*flags_instances)¶
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is_member
¶ flags.is_member is a shorthand for flags.properties is not None. If this property is False then this Flags instance has either zero bits or holds a combination of flag member bits. If this property is True then the bits of this Flags instance match exactly the bits associated with one of the members. This however doesn’t necessarily mean that this flag instance isn’t a combination of several flags because the bits of a member can be the subset of another member. For example if member0_bits=0x1 and member1_bits=0x3 then the bits of member0 are a subset of the bits of member1. If a flag instance holds the bits of member1 then Flags.is_member returns True and Flags.properties returns the properties of member1 but __len__() returns 2 and __iter__() yields both member0 and member1.
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name
¶
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properties
¶ Returns: Returns None if this flag isn’t an exact member of a flags class but a combination of flags, returns an object holding the properties (e.g.: name, data, index, ...) of the flag otherwise. We don’t store flag properties directly in Flags instances because this way Flags instances that are the (temporary) result of flags arithmetic don’t have to maintain these fields and it also has some benefits regarding memory usage.
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to_simple_str
()¶
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class
Simulator.
SimulationState
[source]¶ Simulation state enumeration.
Inheritance
Members
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Prepare
= 0¶
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Analyze
= 1¶
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Elaborate
= 2¶
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Optimize
= 3¶
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Simulate
= 4¶
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View
= 5¶
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Coverage
= 6¶
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class
Simulator.
SimulationResult
[source]¶ Simulation result enumeration.
Inheritance
Members
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NotRun
= 0¶
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DryRun
= 1¶
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Error
= 2¶
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Failed
= 3¶
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NoAsserts
= 4¶
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Passed
= 5¶
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GUIRun
= 6¶
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class
Simulator.
Simulator
(host: Base.IHost, dryRun, simulationSteps: Simulator.SimulationSteps)[source]¶ Base class for all Simulator classes.
Inheritance
Members
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ENVIRONMENT
= 1¶
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VHDL_VERSION
= 2008¶
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__init__
(host: Base.IHost, dryRun, simulationSteps: Simulator.SimulationSteps)[source]¶ Class initializer
Parameters: - host (object) – The hosting instance for this instance.
- dryRun (bool) – Enable dry-run mode
- simulationSteps (SimulationSteps) – A set of simulation step to precess.
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TestSuite
¶
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_PrepareSimulator
()¶
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RunAll
(fqnList, *args, **kwargs)[source]¶ Run a list of testbenches. Expand wildcards to all selected testbenches.
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TryRun
(testbench, *args, **kwargs)[source]¶ Try to run a testbench. Skip skipable exceptions by printing the error and its cause.
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Run
(testbench, board, vhdlVersion, vhdlGenerics=None)[source]¶ Write the Testbench message line, create a PoCProject and add the first *.files file to it.
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Directories
¶
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DryRun
¶
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Host
¶
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Log
(entry, condition=True)¶ Write an entry to the local logger.
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LogDebug
(*args, condition=True, **kwargs)¶
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LogDryRun
(*args, condition=True, **kwargs)¶
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LogError
(*args, condition=True, **kwargs)¶
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LogFatal
(*args, condition=True, **kwargs)¶
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LogInfo
(*args, condition=True, **kwargs)¶
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LogNormal
(*args, condition=True, **kwargs)¶
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LogQuiet
(*args, condition=True, **kwargs)¶
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LogVerbose
(*args, condition=True, **kwargs)¶
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LogWarning
(*args, condition=True, **kwargs)¶
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Logger
¶ Return the local logger instance.
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PoCProject
¶
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TOOL
= 0¶
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TOOL_CHAIN
= 0¶
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VHDLVersion
¶
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_AddFileListFile
(fileListFilePath)¶
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_CreatePoCProject
(projectName, board)¶
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_GetHDLParameters
(configSectionName)¶ Parse option ‘HDLParameters’ for Verilog Parameters / VHDL Generics.
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_GetTimeDeltaSinceLastEvent
()¶
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_Prepare
()¶
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_PrepareEnvironment
()¶
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_PrepareEnvironment_ChangeDirectory
()¶ Change working directory to temporary path ‘temp/<tool>’.
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_PrepareEnvironment_CreatingDirectory
()¶
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_TryLog
(*args, condition=True, **kwargs)¶
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Functions