PoC.xil.DRP_BusMux

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Entity Declaration:

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entity xil_DRP_BusMux is
  generic (
    DEBUG           : boolean                   := FALSE;                   --
    PORTS           : positive                  := 2                        --
  );
  port (
    Clock           : in  std_logic;
    Reset           : in  std_logic;
    
    In_Enable       : in  std_logic_vector(PORTS - 1 downto 0);             --
    In_Address      : in  T_XIL_DRP_ADDRESS_VECTOR(PORTS - 1 downto 0);     --
    In_ReadWrite    : in  std_logic_vector(PORTS - 1 downto 0);             --
    In_DataIn       : in  T_XIL_DRP_DATA_VECTOR(PORTS - 1 downto 0);        --
    In_DataOut      : out T_XIL_DRP_DATA_VECTOR(PORTS - 1 downto 0);        --
    In_Ack          : out std_logic_vector(PORTS - 1 downto 0);             --
    
    Out_Enable      : out std_logic;                                        --
    Out_Address     : out T_XIL_DRP_ADDRESS;                                --
    Out_ReadWrite   : out std_logic;                                        --
    Out_DataIn      : in  T_XIL_DRP_DATA;                                   --
    Out_DataOut     : out T_XIL_DRP_DATA;                                   --
    Out_Ack         : in  std_logic                                         --
  );
end entity;